December 3, 2011

EC1461 VLSI DESIGN question papers Anna university APRIL/MAY 2008 question papers Download


B.E/B.Tech DEGREE EXAMINATION APRIL/MAY 2008
Eighth Semester
(Regulation 2004)
Electrical and Electronics Engineering
EC 1461 -- VLSI DESIGN
Time: 3 hours                                                    Maximum marks: 100
Answer ALL questions
PART A (10 x 2 =20 marks)

1. Compare enhancement and depletion modes of operation.

2. what is problem latch-up?

3. Define a super buffer.

4. Write down the pull-up to pull down ratio required for an nMOS inverter driven through one or more pass transistors.

5. What are the differences between static and dynamic memory cells?

6. What are the applications of Tally circuits?

7. Distinguish between PLA and PAL.

8. Compare PLD and FPGA.

9. Write the entity of a full adder.

10. What are the logical and relational operators available in VHDL?

PART B (5 x 16 = 80)

11 (a) (i) Explain with neat diagrams the n-well process of CMOS fabrication. (10)
(ii) Outline the major steps involved in nMOS fabrication. (6)
(or)
(b) (i)  Derive equations for the drain to source current of an nMOS transister in the nonsaturated and saturated regions of operation. (12)

(ii) Draw and discuss the MOS transistor models. (4)

12.  (a) (i) Derive the pull up to pull down ratio required for an nMOS inverter driven by another nMOS inverter. (8)
(ii) Draw and explain with necessary layouts the different types of contacts cuts. (8)
(or)
(b) (i) Draw and explain the stick and layout diagrams of a two input nMOS NAND gate. (8)

(ii) Give a brief account of BiCMOS and steering logic. (8)

13 (a) (i) Discuss the structured design approach for a parity generator. Draw and explain the stick diagrams for both nMOS and CMOS implimentations. (8)
(ii) Write a brief note on dynamic technology. (8)
(or)
(b) (i) Draw and explain with necessary stick diagram the design of a four way nMOS multiplexer.(8)

(ii) Discuss the operation of a 4 * 4 barrel shifter. (8)

14.  (a) (i) Draw an NMOS based PLA arrangement and illustrate how it can be used to implement multiple output functions of n variables in SOP form. (8)
(ii) Explain the EPROM and EEPROM technology with necessary diagrams. (8)
(or)
(b) Explain the salient features of a field programmable gate array? Clearly bring out the architectural aspects, interconnect, logic and I/O details with suitable diagrams. (16)

15.  (a) (i) Explain the syntax details of a VHDL subprogram. Write a VHDL subprogram to perform binary integer conversion. (8)
(ii) Explain the application of packages in VHDL with a suitable example. (8)
(or)
(b) (i) Write a VHDL description of a test bench for a D flip flop. (8)

(ii) Explain the modeling of a sequential circuit using VHDL. (8)

FEEL USEFUL PLEASE GIVE +1

0 comments :

Post a Comment

Get Syllabus in your Mail

Labels

Accenture Admission Notice - 2010 Admission Notification Anna University Anna University Chennai Anna University Question Papers Anna University Trichy Apparel Technology and Management Aptitude Questions Arts and Science Colleges Biomedical Engineering C and CPP Ebooks Calicut University CBSE Question papers Civil Engineering Civil Service Exams Colleges in India Colleges Result Computer Science Engineering Core Jobs CS R2008 CSE CSIR NET EBooks Download ECE EEE EIE Electives Electrical and Electronics Engineering Electronics and communication Electronics and Instrumentation Engineering Engineering Engineering Colleges in Maharashtra Engineering Colleges in TamilNadu Engineering Admissions Engineering Colleges Engineering Colleges in Karnataka Engineering Jobs Engineering Syllabus Entrance Exam Dates Entrance Exam Results Entrance Examination Exam Time Table Experiencer First Year Syllabus Freshers Full Time Jobs Government jobs in india Hardware and Networking Jobs Hotel Management and Catering Technology IGNOU Information Technology INTEVIEW QUESTIONS IT Jobs JNTU Question Papers Jobs in Bangalore Jobs in Chennai Jobs in Coimbatore Jobs in Delhi Jobs in Hyderabad Jobs in India Jobs in Kerala Jobs in Noida Jobs in Tamilnadu Jobs in TATA Karnataka Educations Lab Manuals Mechanical Engineering Medical Colleges Placement Papers Plus 2 Preparation for exams Private Jobs in India Question Papers Question Papers Download Results Announcement Semester 1 Semester 2 Semester 3 Semester 4 Semester 5 Semester 6 Semester 7 Semester 8 Syllabus Syllabus Download Tamil Movie TCS Placement Papers Teaching Jobs TECH MAHINDRA Textile Technology Top colleges University Results UPSC VICEVESVARAYA TECHNOLOGICAL UNIVERSITY waec Walk-in Interview Web Designers

Followers

Archive

Anna university Engineering Syllabus

Earn Money From Online

Government jobs in india

Admission Notification

Total Pageviews

 

Privacy Policy
http://topengineeringcollegesintamilnadu.blogspot.com use third-party advertising companies to serve ads when you visit our website. These companies may use information (not including your name, address, email address, or telephone number) about your visits to this and other websites in order to provide advertisements about goods and services of interest to you. If you would like more information about this practice and to know your choices about not having this information used by these companies, click here.