B.E/B.Tech DEGREE EXAMINATION APRIL/MAY 2008
Third Semester
Computer Science and Engineering
CS1202 – DIGITAL PRINCIPALS AND SYSTEMS DESIGN
(Common to Information Technology)
(Common to B.E. (Part-Time) Second Semester Regulation 2005)
(Regulation 2004)
Time: 3 hours Maximum marks: 100
Answer ALL questions
PART A (10 x 2 =20 marks)
1. What are minterms?
2.Why would one opt for an approximation algorithm when it is clear that the problem is not exactly solvable?
3. Convert the following number from one base to other (65.342)8 = ( )7
4.What is a priority encoder?
5What is demultiplexer?.
6.Draw the logic diagram for T FlipFlop.
7.What is the maximum range of a memory that can be accessed using 10 address lines?
8.What is modulo – N counter?
9.What is a hazard in combinational circuits?
10.What are the assumptions that must be made for fundamental mode circuit?
PART B (5 x 16 = 80)
1.(a) Using tabulation method simplify the Boolean function F (V, W, X, Y, Z) = ? (0, 1, 8, 11, 12, 15, 20, 21, 22, 24, 29, 31) which has the don’t care conditions d (9, 18, 30). (16)
(or)
(b) (i) Simplify the Boolean function using map method:
F (w, x, y, z) = ? (0, 2, 4, 6, 8, 10, 12, 14)
(ii) Perform subtraction on the following numbers using the 9’s complement of the subtrahend
(1) 5763-3145
(2) 59-9876
(3) 5200-561
12. (a) (i) Design a combinational circuit to convert gray code to BCD. (12)
(ii) What are the design procedures of combinational circuit? (4)
(or)
(b) (i) Design a combinational circuit to convert BCD code to Excess-3 code. (12)
(ii) Design a 3 bit Adder. (4)
13 (a) (i) Implement the Boolean function using 4:1 multiplexer F (W, X, Y, Z) = ? (1, 2, 3, 6, 7, 8, 11, 12, 14) (8)
(ii) A combinational circuit is defined by the functions
F 1 = ? (1, 3, 5)
F 1 = ? (5, 6, 7)
Implement the circuit with a PLA having 3 inputs, 3 product terms and two outputs. (8)
(or)
(b) Construct a BCD adder circuit and write a HDL program module for the same. (16)
14. (a) Explain the different types of shift registers with neat diagram. (16)
(or)
(b) Design a sequence detector to detect the sequence 101011.
15. (a) An asynchronous sequential circuit is described by the following excitation and output function
X = (Y1 Z1 ‘W2) X + (Y1, ‘Z1, W’2)
S = X’
(i) Draw the logic diagram of the circuit
(ii) Derive the transition table and output map.
(iii) Describe the behavior of the circuit. (16)
(or)
(b) Explain essential, static and dynamic hazards in digital circuit. Give hazard-free realization for the following Boolean function. (16)
F (I, J, K, L) = ? m (1, 3, 4, 5, 6, 7, 9, 11, 15)
October 29, 2011
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