2007 Calicut University B.E Electronics and Instrumentation FIFTH SEMESTER B.TECH.(ENGINEERING) DEGREE EXAMINATION - COMPUTER ORGANIZATION AND ARCHITECTURE Question paper
FIFTH SEMESTER B.TECH.(ENGINEERING) DEGREE EXAMINATION,JUNE 2007
BM/AI 04 504 – COMPUTER ORGANIZATION AND ARCHITECTURE
Time: Three hours Maximum Marks: 100 Marks
Answer all questions
Part A
1.
a) What are the steps in executing a complete instruction?
b) Explain the various Bus structures.
c) Explain what is meant by memory hierarchy?
d) Explain the functions of memory management.
e) Explain the various graphic input devices.
f) Explain what is meant by data dependency in a pipeline?
g) Explain the principles in linear pipelining.
h) Explain two parallel processing applications.
Part B(8x5 =40 marks)
2.(a)I. Explain the methods used for encoding information.(7 marks)
II. Explain the steps in fetching a word from memory and storing a word in memory.(8 marks)
(b) Explain the design of a Hardwired control unit. Also discuss its advantages and disadvantages.(15 marks)
3.(a)I. Compare the speed, size and cost of RAM and Cache memory.(7 marks)
II. Explain the design of a fast adder.(8 marks)
(b)I. Explain the address translation mechanism in a virtual memory system.(8 marks)
II. Explain signed operand multiplication with help of an example.(7 marks)
4.(a)
I. Explain the principle of operation of any two output devices.(10 marks)
II. What do you mean by an instruction queue?(5 marks)
(b)I. Discuss the factors which help to study the performance of disk access and communication lines.(8 marks)
II. What is meant by Speedup and Throughput of a pipeline?(7 marks)
5.(a)
I. Give an example of a linear pipeline performing two functions. Draw their reservation tables.(8 marks)
II. Explain the various parallel computer structures.(7 marks)
(b)I. What do you mean by interleaved memory organization?(8 marks)
II. What do you mean by instruction and arithmetic pipelines?(7 marks).
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